Ijpres a Configurable Low Power Mixed Signal for Portable Ecg Monitoring System

A mixed-signal ECG System-on-Chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissueimpedance (ETI) measurement with high signal quality. This can be used to evaluate the quality of the ECG measurement and to filter motion artifacts. A custom digital signal processor consisting of 4-way SIMD processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. A built-in 12-bit analog-todigital converter (ADC) is capable of adaptive sampling achieving a compression ratio of up to 7, and loop buffer integration reduces the power consumption for on-chip memory access. The SoC is implemented in 0.18 μm CMOS process and consumes 32 μW from a 1.2 V while heart beat detection application is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the ECG SoC, the overall system power consumption can be reduced significantly. The AFE supports concurrent 3-channel ECG monitoring, with impedance measurement and bandpower extraction. The custom digital signal processor consisting of a 4-way SIMD processor provides configurability for a wide range of application and advanced functionality like motion artifact removal, accurate R peak detection algorithm, arrhythmia classification and HRV analysis. Various algorithms are possible, allowing different power-performance trade-offs depending on the application requirements. An adaptive sampling ADC significantly reduces the equivalent data-rate of the ADC output without affecting the information content of the input signal, leading to a reduction of data memory access and processing complexity in the DSP domain. The loop buffer integration enables reduction in the access power of the program memory. The presented SoC consumes a best-in-class power consumption of only 31.1 W from a 1.2 V supply in beat detection mode. The SoC has been integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the advanced features of the SoC like adaptive sampling and local processing, which includes motion artifact removal and accurate R peak detection, the monitoring system can reduce the overall power consumption by factor of 20 compare to a generic system without local processing. This allows to long-term and continuous high integrity signal monitoring and also reduces the system formfactor.